Eroxl's Notes
Interrupt (Hardware)

A hardware interrupt is a signal from an I/O controller to the CPU that requests immediate attention. Interrupts allow controllers to initiate communication with the CPU, signaling events such as I/O completion, error conditions, or incoming data.

Hardware Implementation

The CPU includes special registers for interrupt handling:

  • isDeviceInterrupting: Set by the I/O controller when it needs attention
  • interruptControllerID: Identifies which controller is interrupting
  • interruptVectorBase: Points to the interrupt vector table (initialized at boot)

The CPU checks isDeviceInterrupting on every clock cycle—a fast hardware poll. When an interrupt is detected, the CPU:

  1. Saves its current state on the stack
  2. Jumps to the appropriate Interrupt Service Routine (ISR) using the interrupt vector table
  3. Executes the ISR
  4. Returns to the interrupted program using a special RTI (Return from Interrupt) instruction

Interrupt Vector Table

The interrupt vector table is an array of function pointers, indexed by controller ID, that points to each controller's ISR. This table is initialized by the operating system at boot time.

Advantages

  • Efficiency: Eliminates polling overhead by allowing controllers to signal only when needed
  • Asynchrony: Controllers can signal unexpected events (e.g., mouse clicks, network packets)
  • Parallelism: The CPU doesn't waste cycles waiting for I/O; it can perform useful work until interrupted